WaveIntegrity™ is a comprehensive software suite that integrates seamlessly into any customer flow to tackle SLN during digital, analog or RF IP authoring and full system integration, from RTL to tape out.

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If you supply integrated circuits that must meet standards, then you need WaveIntegrity™!

You need to address package specific problems (cost for example)? Then you need WaveIntegrity™!

Your customers use cost constrain PCBs ? Then you need WaveIntegrity™!

SiPEX™ is a silicon substrate extraction plug-in for leading layout parasitic extraction (LPE) flows.

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Are you using RF PDKs ? Then you need SiPEX™ !

If you design RF front-end modules, then you need SiPEX™ !

Do you deliver RF IPs for IoT or 5G ? Then you need SiPEX™ !

For analog / RF designers
(mixed & custom)

Analog/RF IPs can both inject noise and be sensitive to external noise (from other blocks).

The WaveModeler™ tool creates a complete noise model capturing noise signatures obtained from Spice simulations, with internal impedance modeled as S-parameters or lumped devices. The designer can also specify analof IP, electrical nodes and place observation points in key areas (particularly sensitive to external noise).
The noise signatures obtained during the simulation of a SoC can be back-annotated in Spice simulations to assess the damage caused by external noise.

  • Increase immunity to noise

    With the use of the NoisePrototyper™ option, WaveAnalyst™ tool allows you to easily execute a testbench to evaluate the noise signature that reaches the current block and also to control / determine which changes will increase the noise immunity (E.g. power supply distribution strategy, placement of decoupling capacitors, dimensioning of protection structures ...)

  • Provide your system integrator customer with a compact noise model

    The WaveModeler™ tool allows the system integrator to provide a complete noise model while preserving intellectual property. With this model, IP vendors have a factual and quantitative mean to communicate and interact with system integrators.

  • Back-annotate system-level noise in your Spice simulation

    WaveModeler™ offers a simple way to control what noise signature you need WaveAnalyst™ to extract during each system simulation.
    This will result in a dedicated noise signature file the system integrator can communicate to you without giving up his own industrial property.

Recent silicon measurements have demonstrated that RF modules for mmW and 5G applications are very sensitive to silicon substrate parasitics. CWS SiPEX™ integrates seamlessly in leading RF processes to automatically provide best-in-class correlation between simulation output and silicon measurements.

  • Increase device performance

    The SiPEX™ tool provides a unique solution to help foundries offer better RF device performances, and to deliver higher quality simulation models.

  • Improve RF simulation output

    Designers using SiPEX™ benefit from a very high correlation between simulation output and silicon measurements. This allows them to find better physical implementation with less silicon iterations.

Interoperability

CWS is member of Si2, Cadence Design Systems' Connections Program and Mentor Graphics' OpenDoor program.

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This allows WaveIntegrity™ to run natively with OpenAccess databases, as well as to interface seamlessly with software solutions from Cadence and Mentor.