"Simulate mmW, 5G and IoT designs with silicon accuracy"

SiPEX™ accurately models interactions between devices, back-end-of-line, and silicon-on-insulator (SOI) substrates enabling RF Front End Module designers to fully simulate layout and design changes with accuracy, speed and seamless design flow interoperability. SiPEX™ enhances simulation accuracy by taking into account physical effects that were only measurable on silicon in the past. This capability, provided by SiPEX™, is now supported by the leading RF-SOI process design kits (PDKs from GlobalFoundries, STM, TowerJazz), delivering differentiated RF front-end solutions for a wide range of markets including front-end modules for mobile devices, mmWave, 5G and other high-frequency applications.

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"Get system-level noise under control early on!"

While you might feel that you (and your design) are at peace, new perturbation sources might arise at any time! Integration with noisy digital processing often causes the dramatic failure of proven analog and RF functions. Thanks to its unique capabilities, modeling interference noise sources, combined with its effective analysis of electromagnetic propagation through substrate, interconnect and package parasitics, CWS introduces the first global solution for the comprehensive control of system-level noise (SLN) impact on complex integrated systems.

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